| Description |
Build the following gates, using solely elementary NAND gates, D-Flipflops (DFF) and previously-built gates:
The file should be submitted in their original directory structure:
- 1 - Bit, Register, RAM8, RAM64, PC.
- 2 - RAM512, RAM4K, RAM16K.
Each chip in this project is specified by a skeletal *.hdl program with a missing implementation part. In addition, each chip is accompanied by a supplied *.tst script file that tells the hardware simulator how to test it, and a supplied *.cmp file that lists the expected output of the *.hdl program, as mandated by the *.tst script file. All these files are available in a single zip file, which you should download to your computer (explained below).
The task: When loaded into the hardware simulator, your chip design (*.hdl program modified by you), tested on the script specified in the supplied *.tst file, should deliver the behavior specified in the supplied *.cmp file. If that is not the case, the simulator will let you know.
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