extractedLnx/linux-2.4.37/drivers/net/tulip/tulip_core.c_tulip_init_one.c
static int __devinit tulip_init_one (struct pci_dev *pdev,
const struct pci_device_id *ent)
{
struct tulip_private *tp;
/* See note below on the multiport cards. */
static unsigned char last_phys_addr[6] = {0x00, 'L', 'i', 'n', 'u', 'x'};
static int last_irq;
static int multiport_cnt; /* For four-port boards w/one EEPROM */
u8 chip_rev;
int i, irq;
unsigned short sum;
u8 ee_data[EEPROM_SIZE];
struct net_device *dev;
long ioaddr;
static int board_idx = -1;
int chip_idx = ent->driver_data;
unsigned int t2104x_mode = 0;
unsigned int eeprom_missing = 0;
unsigned int force_csr0 = 0;
#ifndef MODULE
static int did_version; /* Already printed version info. */
if (tulip_debug > 0 && did_version++ == 0)
printk (KERN_INFO "%s", version);
#endif
board_idx++;
/*
* Lan media wire a tulip chip to a wan interface. Needs a very
* different driver (lmc driver)
*/
if (pdev->subsystem_vendor == PCI_VENDOR_ID_LMC) {
printk (KERN_ERR PFX "skipping LMC card.\n");
return -ENODEV;
}
/*
* Early DM9100's need software CRC and the DMFE driver
*/
if (pdev->vendor == 0x1282 && pdev->device == 0x9100)
{
u32 dev_rev;
/* Read Chip revision */
pci_read_config_dword(pdev, PCI_REVISION_ID, &dev_rev);
if(dev_rev < 0x02000030)
{
printk(KERN_ERR PFX "skipping early DM9100 with Crc bug (use dmfe)\n");
return -ENODEV;
}
}
/*
* Looks for early PCI chipsets where people report hangs
* without the workarounds being on.
*/
/* Intel Saturn. Switch to 8 long words burst, 8 long word cache aligned
Aries might need this too. The Saturn errata are not pretty reading but
thankfully its an old 486 chipset.
*/
if (pci_find_device(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82424, NULL)) {
csr0 = MRL | MRM | (8 << BurstLenShift) | (1 << CALShift);
force_csr0 = 1;
}
/* The dreaded SiS496 486 chipset. Same workaround as above. */
if (pci_find_device(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_496, NULL)) {
csr0 = MRL | MRM | (8 << BurstLenShift) | (1 << CALShift);
force_csr0 = 1;
}
/* bugfix: the ASIX must have a burst limit or horrible things happen. */
if (chip_idx == AX88140) {
if ((csr0 & 0x3f00) == 0)
csr0 |= 0x2000;
}
/* PNIC doesn't have MWI/MRL/MRM... */
if (chip_idx == LC82C168)
csr0 &= ~0xfff10000; /* zero reserved bits 31:20, 16 */
/* DM9102A has troubles with MRM & clear reserved bits 24:22, 20, 16, 7:1 */
if ((pdev->vendor == 0x1282 && pdev->device == 0x9102)
|| (pdev->vendor == 0x10b9 && pdev->device == 0x5261))
csr0 &= ~0x01f100ff;
#if defined(__sparc__)
/* DM9102A needs 32-dword alignment/burst length on sparc - chip bug? */
if ((pdev->vendor == 0x1282 && pdev->device == 0x9102)
|| (pdev->vendor == 0x10b9 && pdev->device == 0x5261))
csr0 = (csr0 & ~0xff00) | 0xe000;
#endif
/*
* And back to business
*/
i = pci_enable_device(pdev);
if (i) {
printk (KERN_ERR PFX
"Cannot enable tulip board #%d, aborting\n",
board_idx);
return i;
}
ioaddr = pci_resource_start (pdev, 0);
irq = pdev->irq;
/* alloc_etherdev ensures aligned and zeroed private structures */
dev = alloc_etherdev (sizeof (*tp));
if (!dev) {
printk (KERN_ERR PFX "ether device alloc failed, aborting\n");
return -ENOMEM;
}
if (pci_resource_len (pdev, 0) < tulip_tbl[chip_idx].io_size) {
printk (KERN_ERR PFX "%s: I/O region (0x%lx@0x%lx) too small, "
"aborting\n", pdev->slot_name,
pci_resource_len (pdev, 0),
pci_resource_start (pdev, 0));
goto err_out_free_netdev;
}
/* grab all resources from both PIO and MMIO regions, as we
* don't want anyone else messing around with our hardware */
if (pci_request_regions (pdev, "tulip"))
goto err_out_free_netdev;
#ifndef USE_IO_OPS
ioaddr = (unsigned long) ioremap (pci_resource_start (pdev, 1),
tulip_tbl[chip_idx].io_size);
if (!ioaddr)
goto err_out_free_res;
#endif
pci_read_config_byte (pdev, PCI_REVISION_ID, &chip_rev);
/*
* initialize private data structure 'tp'
* it is zeroed and aligned in alloc_etherdev
*/
tp = dev->priv;
tp->rx_ring = pci_alloc_consistent(pdev,
sizeof(struct tulip_rx_desc) * RX_RING_SIZE +
sizeof(struct tulip_tx_desc) * TX_RING_SIZE,
&tp->rx_ring_dma);
if (!tp->rx_ring)
goto err_out_mtable;
tp->tx_ring = (struct tulip_tx_desc *)(tp->rx_ring + RX_RING_SIZE);
tp->tx_ring_dma = tp->rx_ring_dma + sizeof(struct tulip_rx_desc) * RX_RING_SIZE;
tp->chip_id = chip_idx;
tp->flags = tulip_tbl[chip_idx].flags;
tp->pdev = pdev;
tp->base_addr = ioaddr;
tp->revision = chip_rev;
tp->csr0 = csr0;
spin_lock_init(&tp->lock);
spin_lock_init(&tp->mii_lock);
init_timer(&tp->timer);
tp->timer.data = (unsigned long)dev;
tp->timer.function = tulip_tbl[tp->chip_id].media_timer;
dev->base_addr = ioaddr;
#ifdef CONFIG_TULIP_MWI
if (!force_csr0 && (tp->flags & HAS_PCI_MWI))
tulip_mwi_config (pdev, dev);
#else
/* MWI is broken for DC21143 rev 65... */
if (chip_idx == DC21143 && chip_rev == 65)
tp->csr0 &= ~MWI;
#endif
/* Stop the chip's Tx and Rx processes. */
tulip_stop_rxtx(tp);
pci_set_master(pdev);
/* Clear the missed-packet counter. */
inl(ioaddr + CSR8);
if (chip_idx == DC21041) {
if (inl(ioaddr + CSR9) & 0x8000) {
chip_idx = DC21040;
t2104x_mode = 1;
} else {
t2104x_mode = 2;
}
}
/* The station address ROM is read byte serially. The register must
be polled, waiting for the value to be read bit serially from the
EEPROM.
*/
sum = 0;
if (chip_idx == DC21040) {
outl(0, ioaddr + CSR9); /* Reset the pointer with a dummy write. */
for (i = 0; i < 6; i++) {
int value, boguscnt = 100000;
do
value = inl(ioaddr + CSR9);
while (value < 0 && --boguscnt > 0);
dev->dev_addr[i] = value;
sum += value & 0xff;
}
} else if (chip_idx == LC82C168) {
for (i = 0; i < 3; i++) {
int value, boguscnt = 100000;
outl(0x600 | i, ioaddr + 0x98);
do
value = inl(ioaddr + CSR9);
while (value < 0 && --boguscnt > 0);
put_unaligned(le16_to_cpu(value), ((u16*)dev->dev_addr) + i);
sum += value & 0xffff;
}
} else if (chip_idx == COMET) {
/* No need to read the EEPROM. */
put_unaligned(cpu_to_le32(inl(ioaddr + 0xA4)), (u32 *)dev->dev_addr);
put_unaligned(cpu_to_le16(inl(ioaddr + 0xA8)), (u16 *)(dev->dev_addr + 4));
for (i = 0; i < 6; i ++)
sum += dev->dev_addr[i];
} else {
/* A serial EEPROM interface, we read now and sort it out later. */
int sa_offset = 0;
int ee_addr_size = tulip_read_eeprom(ioaddr, 0xff, 8) & 0x40000 ? 8 : 6;
for (i = 0; i < sizeof(ee_data)/2; i++)
((u16 *)ee_data)[i] =
le16_to_cpu(tulip_read_eeprom(ioaddr, i, ee_addr_size));
/* DEC now has a specification (see Notes) but early board makers
just put the address in the first EEPROM locations. */
/* This does memcmp(eedata, eedata+16, 8) */
for (i = 0; i < 8; i ++)
if (ee_data[i] != ee_data[16+i])
sa_offset = 20;
if (chip_idx == CONEXANT) {
/* Check that the tuple type and length is correct. */
if (ee_data[0x198] == 0x04 && ee_data[0x199] == 6)
sa_offset = 0x19A;
}
if (ee_data[0] == 0xff && ee_data[1] == 0xff &&
ee_data[2] == 0) {
sa_offset = 2; /* Grrr, damn Matrox boards. */
multiport_cnt = 4;
}
#ifdef CONFIG_DDB5476
if ((pdev->bus->number == 0) && (PCI_SLOT(pdev->devfn) == 6)) {
/* DDB5476 MAC address in first EEPROM locations. */
sa_offset = 0;
/* No media table either */
tp->flags &= ~HAS_MEDIA_TABLE;
}
#endif
#ifdef CONFIG_DDB5477
if ((pdev->bus->number == 0) && (PCI_SLOT(pdev->devfn) == 4)) {
/* DDB5477 MAC address in first EEPROM locations. */
sa_offset = 0;
/* No media table either */
tp->flags &= ~HAS_MEDIA_TABLE;
}
#endif
#ifdef CONFIG_MIPS_COBALT
if ((pdev->bus->number == 0) &&
((PCI_SLOT(pdev->devfn) == 7) ||
(PCI_SLOT(pdev->devfn) == 12))) {
/* Cobalt MAC address in first EEPROM locations. */
sa_offset = 0;
/* No media table either */
tp->flags &= ~HAS_MEDIA_TABLE;
}
#endif
#ifdef __hppa__
/* 3x5 HSC (J3514A) has a broken srom */
if(ee_data[0] == 0x61 && ee_data[1] == 0x10) {
/* pci_vendor_id and subsystem_id are swapped */
ee_data[0] = ee_data[2];
ee_data[1] = ee_data[3];
ee_data[2] = 0x61;
ee_data[3] = 0x10;
/* srom need to be byte-swaped and shifted up 1 word.
* This shift needs to happen at the end of the MAC
* first because of the 2 byte overlap.
*/
for(i = 4; i >= 0; i -= 2) {
ee_data[17 + i + 3] = ee_data[17 + i];
ee_data[16 + i + 5] = ee_data[16 + i];
}
}
#endif
for (i = 0; i < 6; i ++) {
dev->dev_addr[i] = ee_data[i + sa_offset];
sum += ee_data[i + sa_offset];
}
}
/* Lite-On boards have the address byte-swapped. */
if ((dev->dev_addr[0] == 0xA0 || dev->dev_addr[0] == 0xC0)
&& dev->dev_addr[1] == 0x00)
for (i = 0; i < 6; i+=2) {
char tmp = dev->dev_addr[i];
dev->dev_addr[i] = dev->dev_addr[i+1];
dev->dev_addr[i+1] = tmp;
}
/* On the Zynx 315 Etherarray and other multiport boards only the
first Tulip has an EEPROM.
On Sparc systems the mac address is held in the OBP property
"local-mac-address".
The addresses of the subsequent ports are derived from the first.
Many PCI BIOSes also incorrectly report the IRQ line, so we correct
that here as well. */
if (sum == 0 || sum == 6*0xff) {
#if defined(__sparc__)
struct pcidev_cookie *pcp = pdev->sysdata;
#endif
eeprom_missing = 1;
for (i = 0; i < 5; i++)
dev->dev_addr[i] = last_phys_addr[i];
dev->dev_addr[i] = last_phys_addr[i] + 1;
#if defined(__sparc__)
if ((pcp != NULL) && prom_getproplen(pcp->prom_node,
"local-mac-address") == 6) {
prom_getproperty(pcp->prom_node, "local-mac-address",
dev->dev_addr, 6);
}
#endif
#if defined(__i386__) /* Patch up x86 BIOS bug. */
if (last_irq)
irq = last_irq;
#endif
}
for (i = 0; i < 6; i++)
last_phys_addr[i] = dev->dev_addr[i];
last_irq = irq;
dev->irq = irq;
/* The lower four bits are the media type. */
if (board_idx >= 0 && board_idx < MAX_UNITS) {
if (options[board_idx] & MEDIA_MASK)
tp->default_port = options[board_idx] & MEDIA_MASK;
if ((options[board_idx] & FullDuplex) || full_duplex[board_idx] > 0)
tp->full_duplex = 1;
if (mtu[board_idx] > 0)
dev->mtu = mtu[board_idx];
}
if (dev->mem_start & MEDIA_MASK)
tp->default_port = dev->mem_start & MEDIA_MASK;
if (tp->default_port) {
printk(KERN_INFO "tulip%d: Transceiver selection forced to %s.\n",
board_idx, medianame[tp->default_port & MEDIA_MASK]);
tp->medialock = 1;
if (tulip_media_cap[tp->default_port] & MediaAlwaysFD)
tp->full_duplex = 1;
}
if (tp->full_duplex)
tp->full_duplex_lock = 1;
if (tulip_media_cap[tp->default_port] & MediaIsMII) {
u16 media2advert[] = { 0x20, 0x40, 0x03e0, 0x60, 0x80, 0x100, 0x200 };
tp->mii_advertise = media2advert[tp->default_port - 9];
tp->mii_advertise |= (tp->flags & HAS_8023X); /* Matching bits! */
}
if (tp->flags & HAS_MEDIA_TABLE) {
memcpy(tp->eeprom, ee_data, sizeof(tp->eeprom));
sprintf(dev->name, "tulip%d", board_idx); /* hack */
tulip_parse_eeprom(dev);
strcpy(dev->name, "eth%d"); /* un-hack */
}
if ((tp->flags & ALWAYS_CHECK_MII) ||
(tp->mtable && tp->mtable->has_mii) ||
( ! tp->mtable && (tp->flags & HAS_MII))) {
if (tp->mtable && tp->mtable->has_mii) {
for (i = 0; i < tp->mtable->leafcount; i++)
if (tp->mtable->mleaf[i].media == 11) {
tp->cur_index = i;
tp->saved_if_port = dev->if_port;
tulip_select_media(dev, 2);
dev->if_port = tp->saved_if_port;
break;
}
}
/* Find the connected MII xcvrs.
Doing this in open() would allow detecting external xcvrs
later, but takes much time. */
tulip_find_mii (dev, board_idx);
}
/* The Tulip-specific entries in the device structure. */
dev->open = tulip_open;
dev->hard_start_xmit = tulip_start_xmit;
dev->tx_timeout = tulip_tx_timeout;
dev->watchdog_timeo = TX_TIMEOUT;
dev->stop = tulip_close;
dev->get_stats = tulip_get_stats;
dev->do_ioctl = private_ioctl;
dev->set_multicast_list = set_rx_mode;
if (register_netdev(dev))
goto err_out_free_ring;
printk(KERN_INFO "%s: %s rev %d at %#3lx,",
dev->name, tulip_tbl[chip_idx].chip_name, chip_rev, ioaddr);
pci_set_drvdata(pdev, dev);
if (t2104x_mode == 1)
printk(" 21040 compatible mode,");
else if (t2104x_mode == 2)
printk(" 21041 mode,");
if (eeprom_missing)
printk(" EEPROM not present,");
for (i = 0; i < 6; i++)
printk("%c%2.2X", i ? ':' : ' ', dev->dev_addr[i]);
printk(", IRQ %d.\n", irq);
if (tp->chip_id == PNIC2)
tp->link_change = pnic2_lnk_change;
else if ((tp->flags & HAS_NWAY) || tp->chip_id == DC21041)
tp->link_change = t21142_lnk_change;
else if (tp->flags & HAS_PNICNWAY)
tp->link_change = pnic_lnk_change;
/* Reset the xcvr interface and turn on heartbeat. */
switch (chip_idx) {
case DC21041:
if (tp->sym_advertise == 0)
tp->sym_advertise = 0x0061;
outl(0x00000000, ioaddr + CSR13);
outl(0xFFFFFFFF, ioaddr + CSR14);
outl(0x00000008, ioaddr + CSR15); /* Listen on AUI also. */
outl(inl(ioaddr + CSR6) | csr6_fd, ioaddr + CSR6);
outl(0x0000EF01, ioaddr + CSR13);
break;
case DC21040:
outl(0x00000000, ioaddr + CSR13);
outl(0x00000004, ioaddr + CSR13);
break;
case DC21140:
case DM910X:
default:
if (tp->mtable)
outl(tp->mtable->csr12dir | 0x100, ioaddr + CSR12);
break;
case DC21142:
if (tp->mii_cnt || tulip_media_cap[dev->if_port] & MediaIsMII) {
outl(csr6_mask_defstate, ioaddr + CSR6);
outl(0x0000, ioaddr + CSR13);
outl(0x0000, ioaddr + CSR14);
outl(csr6_mask_hdcap, ioaddr + CSR6);
} else
t21142_start_nway(dev);
break;
case PNIC2:
/* just do a reset for sanity sake */
outl(0x0000, ioaddr + CSR13);
outl(0x0000, ioaddr + CSR14);
break;
case LC82C168:
if ( ! tp->mii_cnt) {
tp->nway = 1;
tp->nwayset = 0;
outl(csr6_ttm | csr6_ca, ioaddr + CSR6);
outl(0x30, ioaddr + CSR12);
outl(0x0001F078, ioaddr + CSR6);
outl(0x0201F078, ioaddr + CSR6); /* Turn on autonegotiation. */
}
break;
case MX98713:
case COMPEX9881:
outl(0x00000000, ioaddr + CSR6);
outl(0x000711C0, ioaddr + CSR14); /* Turn on NWay. */
outl(0x00000001, ioaddr + CSR13);
break;
case MX98715:
case MX98725:
outl(0x01a80000, ioaddr + CSR6);
outl(0xFFFFFFFF, ioaddr + CSR14);
outl(0x00001000, ioaddr + CSR12);
break;
case COMET:
/* No initialization necessary. */
break;
}
/* put the chip in snooze mode until opened */
tulip_set_power_state (tp, 0, 1);
return 0;
err_out_free_ring:
pci_free_consistent (pdev,
sizeof (struct tulip_rx_desc) * RX_RING_SIZE +
sizeof (struct tulip_tx_desc) * TX_RING_SIZE,
tp->rx_ring, tp->rx_ring_dma);
err_out_mtable:
if (tp->mtable)
kfree (tp->mtable);
#ifndef USE_IO_OPS
iounmap((void *)ioaddr);
err_out_free_res:
#endif
pci_release_regions (pdev);
err_out_free_netdev:
kfree (dev);
return -ENODEV;
}
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