The IXP Lab Projects and Researches

The IXP lab is based on Intel IXP1200 Network Processor. Intel provides together with the IXP1200 Evaluation Board, a CD that contains a simulator working on Windows NT environment, HW and SW documentation, source codes of the SA_CORE code and microengines code and usefull examples and references. An installation of the CD can be found on the Hacker PC that is in the HA lab.

Related Links:

• Intel - IXP1200 Network Processor
• Network Processor Forum

IXP lab Main Goals

• Produce an embedded platform for further research in the area of routing, queuing and other traffic management fields.
• Provide the students the opportunity to get a "hands-on" experience in real time environment and operating systems.
• Provide a practical experts in router internals. The network processor is based on router technology. Network Processor is relatively a new family of routers with a lot of software open issues.
• Provide the knowledge of Routing Management software environment by interfacing and using Radlan Israel OpENS.

Participants

• Tal Anker
• Miriam Allalouf
• Yigal Eliaspur
• Joe Andonieh
• Yzhar Keysar

Internal Documentation

The following internal documents are provided by us, (extra to the documentation provided by Intel). The first (Word) doc describes the high level flow the routes of the packets as navigated by the microengines, the second doc provides a low-level (type of pseudo code) description of the microengines code.

The following paper provides a simple checklist of how to raise up and set the evaluation board.

Projects

• Microengines code: Exact Match Lookup: Implementation
• SA-Core and Micro-Engines: Intra Communication